1. Field of the Invention
The present invention relates to an amplifier circuit and a light receiving amplifier circuit using the same.
2. Description of Related Art
The recording speed of optical disc apparatus including CDs, DVDs, and Blue-Ray Discs has been increasing. This shortens the cycle of recording pulse waveforms for writing data into the optical discs. The optical power when the recording pulse is generated needs to be obtained accurately from low power to high power. There is also a need to accurately detect rising and falling of pulses without occurrence of ringing. Hence, amplifier circuits used in ICs (integrated circuits) receiving recording pulse waveforms are required to generate pulse response without ringing while keeping the wide-band frequency characteristics.
One example of an amplifier circuit used in a light receiving IC includes a technique disclosed in Japanese Unexamined Patent Application Publication No. 6-338732. FIG. 9 shows a feedback amplifier circuit 1 disclosed in Japanese Unexamined Patent Application Publication No. 6-338732. As shown in FIG. 9, the feedback amplifier circuit 1 includes a differential amplifier AMP1 and a feedback circuit 10.
The differential amplifier AMP1 amplifies a signal input from an input terminal IN received by an inverting input terminal and outputs the amplified signal to an output terminal OUT. Note that symbols “IN” and “OUT” are used to mean both the terminal names and the signal names input/output to/from the terminals.
The feedback circuit 10 includes feedback resistors R1, R2, R3, feedback capacitors C1, C2, and an NPN transistor Q1. The feedback circuit 10 feeds-back an output of the differential amplifier AMP1 to the inverting input terminal so that the differential amplifier AMP1 exhibits a certain amplification ratio. The differential amplifier AMP1 is an ideal differential amplifier; it operates with high input impedance, low output impedance, and high open loop gain, and has sufficient frequency band regarding the frequency characteristics.
The feedback resistors R1 and R2 are connected in series between the input terminal IN and the output terminal OUT. The feedback capacitor C1 is connected between the input terminal IN and the output terminal OUT. The feedback resistor R3 is connected between the input terminal IN and a node N1. The feedback capacitor C2 is connected between the input terminal IN and the node N1.
The NPN transistor Q1 has a base connected to an intermediate node between the feedback resistors R1 and R2, a collector connected to a power supply voltage terminal VDD, and an emitter connected to the node N1.
FIG. 10 shows operational waveforms of the feedback amplifier circuit 1. As shown in FIG. 10, the direct current component of the input signal of the feedback amplifier circuit 1 increases, and the potential of the output terminal OUT also increases. The increase of the potential of the output terminal OUT increases the potential of the node N1. At time t1, the potential of the node N1 becomes larger than the threshold voltage of the NPN transistor Q1. Hence, at time t1, the NPN transistor Q1 is ON. Accordingly, the impedance of the feedback circuit 10 is reduced, and the amplification ratio of the feedback amplifier circuit 1 is reduced. The reduction in the amplification ratio suppresses oscillation of the feedback amplifier circuit 1.
When the direct current component of the input signal IN is reduced and the potential of the output terminal OUT is reduced, the potential of the node N1 becomes lower than the threshold voltage of the NPN transistor Q1 at time t2. Hence, the NPN transistor Q1 is OFF again. Hence, the impedance of the feedback circuit 10 is returned to the state before time t1 again.
As stated above, the feedback amplifier circuit 1 reduces the impedance of the feedback circuit 10 when the direct current component of the input signal increases and the potential of the node N1 becomes larger than the threshold voltage of the NPN transistor Q1. In this way, by reducing the impedance of the feedback circuit 10, the amplification ratio of the feedback amplifier circuit 1 is reduced and oscillation is suppressed. The feedback capacitor C2 suppresses the expansion of the frequency band of the feedback amplifier circuit 1. Accordingly, sufficient phase compensation is performed, and oscillation in the feedback amplifier circuit 1 is effectively prevented.